Allegro

Allegro

Senior Principal Digital SoC Architect

Richardson, TX · Principal

Sponsorship not specifiedDetected 2 days ago
MATLABAlgorithmsRoadmappingCustomer SuccessVerilogSignal ProcessingSimulinkLeadershipCommunicationMentoring

About the role

  • As a Senior Principal Digital SoC Architect, you will be the driving force behind the technical definition, microarchitecture, and execution strategy of Allegro's next-generation mixed-signal Systems-on-Chip (SoCs).

Responsibilities

  • SoC Architecture & Definition: Lead the architectural definition and technical specifications (Target Specs) of complex, mixed-signal SoCs. Define CPU/DSP subsystems, bus fabrics, memory maps, power management schemes, and digital/analog interfaces.
  • IP Strategy & Reuse: Define and champion the digital IP roadmap (e.g., hardware accelerators, security blocks, communication protocols). Drive global IP reuse strategies to improve design quality and reduce time-to-market.
  • Modeling & Feasibility: Develop architectural and transaction-level models to validate performance, latency, and power budgets early in the design cycle.
  • Cross-Functional Technical Leadership: Serve as the primary technical bridge between Product Marketing, Analog Design, Digital Design, Physical Design, Verification (DV/MSDV), and Software/Systems teams to ensure flawless top-level integration.
  • Technology & Process Roadmapping: Partner with Technology Development to select optimal silicon process nodes (e.g., SG8) and packaging technologies to meet cost, thermal, and performance goals.

Requirements

  • Expertise in multi-voltage domains, power gating, dynamic voltage frequency scaling (DVFS), and UPF-driven verification.
  • High proficiency in system modeling (SystemC, MATLAB/Simulink) and digital front-end design tools (Verilog, SystemVerilog).
  • Direct experience with smart motor control, brushless DC (BLDC) algorithms, or advanced magnetic sensing systems.
  • Experience with hardware security modules (HSM) and cryptographic accelerators.
  • Experience with mixed-signal design flows (MSDV) and top-level chip integration.

Nice to have

  • B.S. or M.S. in Electrical or Computer Engineering (Ph.D. preferred) with a deep technical focus.
  • 12+ years of experience in semiconductor digital design, with 5+ years acting as a lead SoC Architect.
  • Deep experience integrating embedded processors (ARM Cortex-M/R, RISC-V), network-on-chip (NoC) interconnects, and memory subsystems (SRAM, Flash, NVM).
  • Mastery of automotive and industrial protocols (CAN-FD, LIN, SPI, I2C, I3C, Ethernet, SENT).

This listing is sourced directly from Allegro's careers page and normalized into a canonical job model.