Winmaxsystemscorporation
Principal Emulation and Validation Engineer
San Jose, CA, United States · Principal
Sponsorship not specifiedDetected 3380 days ago
PythonC++RubyData StructuresAlgorithmsLinuxProject ManagementCadenceVerilogElectrical EngineeringLeadershipCommunicationProblem SolvingOrganizational Skills
About the role
- All your information will be kept confidential according to EEO guidelines.
Responsibilities
- o Synthesize complex system on chip designs and map into various hardware emulator platforms like Cadence Palladium or Mentor Veloce.
- o Develop system level tests using tcl, itcl, python, C/C++ languages to verify networking switch chips and systems.
- o Create reusable design blocks, libraries and verification components for emulation.
- o Create and maintain emulation environment for worldwide user community.
Requirements
- o Total engineering minimum experience required is typically a BS degree and 12+ years of experience, an MS degree and 9+ years of experience or a PhD and 6 years of experience or equivalent.
- o Hands-on experience with Leadership qualities on driving ASIC / SoC verification flows and methodologies.
- o Must have hands-on experience with network protocol validation, RFC, IEEE, etc.
- o Strong expertise in writing system level tests and driver using C/C++, Tcl, iTcl, Perl and Python.
- o Must be a team player with good verbal and written communication skills.
- o Must be self-driven engineer with good project management and organizational skills to deliver high quality output in a timely manner.
Nice to have
- o BS (EE/Electrical Engineering or CS/Computer Science) required, MS (EE or CS) preferred or equivalent.
- Automation experience is a plus.
Benefits
- o Write Complex Device Driver using C/C++ to implement feature on a flexible architecture and support and promote with wide range customer adoption.
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