Altera

Altera

Place and Route Design Automation Engineer

Toronto, Ontario, Canada · Senior

Sponsorship not specified$84k-$121kDetected 4 days ago
PythonAlgorithmsLinuxCadenceFPGAElectrical Engineering

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odds of building a lasting career here

50Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role90
Entry-level history0
PERM / green-card track0
Lottery odds (Level II)66
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~30% per draw at Level II). Good if you win; have a cap-exempt backup on your list.

Lottery odds assume a STEM candidate.

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Employer immigration record

from this employer's Department of Labor filings

Green-card intent detected

Altera Corporation obtained a prevailing wage determination for Electronics Engineers, Except Computer in San Jose, CALIFORNIA on 2026-06-10. No matching green-card filing appears in our data yet. The determination expires in 2 days (2026-09-07), and a green-card filing must follow before then or the employer starts over.+2 more active determinations on file

Files H-1B transfers

13 transfer filings in the last year, covering 13 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • At Altera™, our independence as the world's largest pure ‑ play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise.
  • Contribute to the development of new methodologies for next-generation Place & Route flows and tool enhancements.
  • Assist in evaluating and testing new P&R tool capabilities and methodologies.

Responsibilities

  • Work on Place & Route tools, flows, and methodologies for FPGA silicon design development.
  • Help maintain and improve existing P&R automation flows and infrastructure.
  • Provide end-user support for flow tools, including debugging issues and promoting best practices.
  • Develop and enhance scripts and automation utilities to improve usability, efficiency, and scalability.
  • Support improvements in P&R quality of results (timing, power, congestion, density, and overall design closure).
  • Identify design or flow bottlenecks and implement practical optimizations.
  • Collaborate closely with multi-geo teams across physical design, RTL, synthesis, and CAD to ensure robust end-to-end flow support.
  • Document methodologies, flow updates, and usage guidelines.
  • As an independent company, we move faster, invest deeper, and partner more closely-empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.
  • Altera is seeking a motivated Senior Place & Route (P&R) Design Automation Engineer to join our Design Methodology and Automation organization.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, with 7+ years of industry experience in semiconductor design or design automation.
  • 7+ years of experience working with Place & Route tools and strong applied knowledge of P&R algorithms, methodologies, and design flows.
  • 7+ years of experience using industry-standard EDA vendor tools (e.g., Synopsys and Cadence P&R tool suites) in production design environments.
  • 7+ years of strong coding experience in Tcl, Perl, and Python for automation, scripting, and tool integration.
  • 7+ years of experience working in Unix/Linux development environments.
  • 7+ years of experience applying physical design fundamentals, including floorplanning, placement, clocking, routing, and static timing analysis (STA).
  • 7+ years of experience debugging and resolving tool, flow, or design issues in a collaborative engineering environment.
  • 7+ years of experience collaborating with cross-functional and/or multi-geo engineering teams to support design execution.
  • We use artificial intelligence to screen, assess, or select applicants for the position. ​ This posting is for an existing vacancy. ​ Canadian work experience is not required for this role.
  • Applicants must be eligible for any required Canada export authorizations.
  • 7+ years of hands-on experience in Place & Route (P&R), physical design, or design automation within FPGA or ASIC development environments.

Skills

  • About Altera

Compensation

  • Our compensation is designed to reflect the Canadian labour market.
  • The actual salary offered may vary based on several factors, including the position's location, as well as the candidate's experience, skills, training, and job-specific knowledge.
  • In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success. ​
  • Estimated Salary Range: $83,500 - 120,925 CAD

This listing is sourced directly from Altera's careers page and normalized into a canonical job model.