Normal Computing

Normal Computing

Hardware Engineer, RTL/PD

New York City

Sponsorship not specified$10k-$100kDetected 22 hours ago
Node.jsFull-Stack DevelopmentAlgorithmsAccessibilityVerilog

> stay_score

odds of building a lasting career here

37Risky
Cap-exempt (no lottery)0
Sponsors this role80
Entry-level history0
PERM / green-card track0
Lottery odds (Level I)39
Fits your clock70

Thin sponsorship signal and lottery-bound (~15% per draw). A low-probability bet with your clock running. Prioritize cap-exempt roles and proven entry-level sponsors first.

Lottery odds assume a STEM candidate.

Personalize to your clock →

> community_outcomes

No reports yet — be the first to help the next applicant.

About the role

  • Hands-on experience writing production RTL in SystemVerilog and closing it through synthesis and place-and-route
  • At least three tapeouts in your background, from any node and any company size
  • Experience working on datapaths, pipelines, or custom logic where the microarchitecture was not fully specified upfront

Responsibilities

  • Normal Computing builds silicon that turns thermal noise from an obstacle into a computational resource.
  • We co-design the full stack:
  • Physical Design:Take synthesized RTL gates through the full backend design flow, including floorplanning, detailed place and route, CTS, DFT insertion, timing closure, and LVS/DRC.
  • Experience at an AI chip company where design, verification, and PD were tightly coupled
  • As an RTL and PD Design Engineer at Normal, you will take and optimize RTL through synthesis and the backend to produce GDSII ready for tapeout.
  • This work sits at the intersection of classical ASIC design, novel computing architectures, and a development environment where the hardware and the algorithms are built together, not in sequence
  • You will own RTL from microarchitecture to tapeout: writing microarchitecture specifications, creating synthesizable SystemVerilog, working with design verification engineers to fully test the design using conventional and formal methods.

Requirements

  • Familiarity with RISC-V or other open ISAs
  • Experience with AI-assisted RTL or EDA tooling in your design workflow

Compensation

  • $10k-$100k

Company info

  • Because Normal's chips are not standard accelerators, the RTL engineer here is closer to first-principles decisions than at a larger company.

Equal opportunity

  • Normal Computing is an Equal Opportunity Employer.
  • We celebrate diversity and are committed to creating an inclusive environment for all employees.
  • All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
  • Accessibility Accommodations

This listing is sourced directly from Normal Computing's careers page and normalized into a canonical job model.