Nuvacore

Nuvacore

CPU Micro-Architect / RTL (Lead & IC Engineers)

Austin, TX

Sponsorship not specified$140k-$300kDetected 30 days ago
PythonC++Thermal AnalysisVerilogCommunication

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odds of building a lasting career here

59Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role80
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.

Lottery odds assume a STEM candidate.

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Employer immigration record

from this employer's Department of Labor filings

Files H-1B transfers

8 transfer filings in the last year, covering 8 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • As a CPU Micro-Architect/RTL Engineer, you will participate in the following:
  • Verification - assist the verification team in all forms of CPU verification used, such as testbench development, formal methods, and simulation/emulation for formal verification
  • Performance exploration and correlation - explore high-performance strategies and work with the performance architecture and verification team to verify that the RTL meets targeted performance.

Responsibilities

  • Critical understanding of the various pipelines and intra-unit communication will be necessary to build a clean yet performant design.
  • RTL design - develop and refine RTL which targets the power, performance, area and timing goals.
  • Physical design - work with the PD engineering team to implement and verify the physical design meets the goals.
  • Be able to iterate and refine the RTL design.
  • BS or MS with 15+ (leads) and 7+ (ICs) years experience in high-performance, low-power CPU design
  • Solid understanding of logic and physical design and the impacts on timing, power, and area
  • Strong background in low power microarchitecture and high-performance design techniques, with a proven track record of execution on multiple CPU programs and products

Requirements

  • Experience with RISC-V or ARM64 or x86 ISA and their impacts on CPU micro-architectural choices

Nice to have

  • Experience with coding in Verilog, debugging, simulation, ideally with experience driving modern AI Tools to assist in RTL coding

Compensation

  • $140k-$300k

This listing is sourced directly from Nuvacore's careers page and normalized into a canonical job model.