Altera

Altera

FPGA IP Design Engineer - Intern

Toronto, Ontario, Canada · Intern · Internship

Sponsorship not specified$95k-$100kDetected 5 days ago
PythonC++CIntellectual PropertyFPGAVHDLVerilogElectrical EngineeringSensors

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odds of building a lasting career here

50Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role90
Entry-level history0
PERM / green-card track0
Lottery odds (Level II)66
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~30% per draw at Level II). Good if you win; have a cap-exempt backup on your list.

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Files H-1B transfers

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About the role

  • These solutions are provided as highly configurable intellectual property IP cores that are fully integrated with Altera's software CAD tool, Quartus Prime.
  • Altera's IP cores provide configurable access to these high-speed, high-bandwidth interfaces, leveraging dedicated and specialized silicon subsystems in the FPGA.
  • Your specific responsibilities can include, but are not limited to the following:

Responsibilities

  • Architecture and Design based on the latest protocol specifications for memory, chip-to-chip, or transceiver interfaces
  • Device support and CAD tool integration
  • New product release and rollout support, customer technical support.
  • Our compensation is designed to reflect the Canadian labour market.
  • Altera is hiring a FPGA IP Design Engineer - Intern!
  • As an IP Design Engineering Intern, you will work with a team of engineers to develop and verify state-of-the-art memory interface, chip-to-chip, or transceiver-based IP cores.
  • You will be working on advanced device architectures, design definition, implementation, and verification.
  • You will also be developing design examples and simulation models, accompanied by a rich set of technical documentation.

Requirements

  • We use artificial intelligence to screen, assess, or select applicants for the position.​ This posting is for an existing vacancy.​ Canadian work experience is not required for this role.
  • Applicants must be eligible for any required Canada export authorizations.
  • Software programming and/or scripting (e.g. C/C++, Python), digital logic, RTL design (e.g. SystemVerilog, Verilog, VHDL), or similar

Nice to have

  • FPGA design experience, Experience with RTL simulation, timing closure, STA, Experience with Memory Interfaces.

Skills

  • Verification (e.g. verification IP, methodologies, frameworks, bus functional models, regression tests)

Compensation

  • In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.​
  • The actual salary offered may vary based on several factors, including the position's location, as well as the candidate's experience, skills, training, and job-specific knowledge.

Company info

  • As modern FPGAs become increasingly like a SoC, Altera's IP Systems and Solutions Engineering (IPSS) team develops comprehensive solutions to provide customers easy and efficient access to the capabilities of Altera's FPGA devices.

This listing is sourced directly from Altera's careers page and normalized into a canonical job model.