Altera
Design Automation Engineer
San Jose, California, United States · Junior
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About the role
- Accelerating Innovators - Altera provides leadership programmable solutions that are easy to use and deploy, across the cloud to the edge, enabling limitless possibilities for AI.
- Our broad portfolio includes FPGAs, SoCs, CPLDs, IP, development tools, system-on-modules, SmartNICs and IPUs, offering the flexibility to accelerate innovation.
Responsibilities
- Help develop and support STA flows
- Collaborate on timing modeling and methodology improvements
- Help with designs, develops, tests, and debugs software tools, flows, and methodologies used in design automation and by teams in the design of hardware products, process design, or manufacturing.
- include capturing user stories/requirements, writing both functional and test code, automating build and deployment, and/or performing unit, integration, and end-to-end testing of the software tools.
- You will be responsible for developing, maintaining, and enhancing STA methodologies, collaborating with design and CAD teams to ensure timing closure and flow robustness.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field with 1+ years of experience in the following skills:
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field with 1+ years of experience in the following
- The ideal candidate will have hands-on experience with Synopsys PrimeTime and Cadence Tempus and strong scripting skills (Python, Tcl, Shell, Perl).
- Applicants must be eligible for any required U.S. export authorizations.*
- We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.*
Nice to have
- Experience with Liberty model characterization and STA-tool-based Liberty model extraction
- Familiarity with Fusion Compiler, Innovus, Cadence Pegasus, and other EDA tools
- Shift 1 (United States of America)
- San Jose, California, United States
- Posting Statement:
Skills
- 1+ years of experience in Static Timing Analysis
- 1+ years of experience in Liberty (.lib) model format
- 1+ years of experience in methodology and flow development experience
- 1+ years of experience Scripting experience (Python, Perl, TCL, shell)
- Our innovation in programmable logic began in 1983.
- Join us on our journey to becoming the world's #1 FPGA company!
Compensation
- The pay range below is for Bay Area California only.
- Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc.
- We also offer incentive opportunities that reward employees based on individual and company performance.
- $95,000 - $110,000 USD
Company info
- Since then we've delivered the tools and technologies that empower customers to innovate, differentiate, and succeed in their markets.
- We are seeking for DA Engineer to join our static timing analysis (STA) team and contribute to flow development and STA tool across advanced digital design projects.
This listing is sourced directly from Altera's careers page and normalized into a canonical job model.