Nuvacore

Nuvacore

CPU Physical Design (RTL to GDS)

Austin, TX · Senior

Sponsorship not specified$140k-$250kDetected 44 days ago
PythonAgentic AIElectrical EngineeringCommunicationCollaboration

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odds of building a lasting career here

59Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role80
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.

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from this employer's Department of Labor filings

Files H-1B transfers

8 transfer filings in the last year, covering 8 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

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About the role

  • Exhibit thoroughness and precision in ECO (Engineering Change Order) flows.

Responsibilities

  • Nuvacore is building ground-up high performance, low power CPU for next generation compute workloads.
  • As a member of CPU - specific custom circuit design team, you will enable the design to achieve the target PPA Specifications for the product.
  • Responsible for driving end-to-end design closure from RTL to GDS/Tape-out, ensuring target PPAS (Power, Performance, Area & Schedule) commitments are met.
  • Responsible for coordinating and aligning with CAD, RTL/µ-arch, and other partner teams to ensure seamless execution throughout the design cycle.
  • Proven experience in PPA optimization across CPU units and design blocks.
  • Deep understanding of end-to-end physical design closure, spanning all signoff domains
  • Well-versed in timing constraints for both Functional and DFT (Design for Test) modes.
  • Bring proven experience in PPA-focused design execution for CPUs, including hands-on tool optimization to achieve power, performance, and area targets.
  • Hold a deep understanding of Physical Design (PD) signoff checks and methodologies, including FEV, VCLP, EM/IR, STA/EXT, and associated closure flows.
  • Proficient in Python, Perl, or TCL to enhance design productivity and flow efficiency

Requirements

  • Hold a BS or MS degree with 12+ years of experience (for Lead roles) or 5+ years of experience (for Individual Contributor roles) in CPU physical design.
  • Possess substantial years of experience in CPU unit-level implementation

Skills

  • Strong communication and collaboration skills
  • Experience in using Agentic AI tools for productivity and automation.

Compensation

  • $140k-$250k

This listing is sourced directly from Nuvacore's careers page and normalized into a canonical job model.