Astera Labs Inc.

Astera Labs Inc.

Principal Electrical Engineer – Smart Cable Modules

San Jose, California, United States · Principal

Sponsorship not specified$185k-$240kDetected 21 days ago
PythonAlgorithmsMachine LearningProduct ManagementProduct StrategyBudgetingProcess ImprovementPCB DesignCadenceElectrical EngineeringHardware DesignSignal ProcessingLeadership

Stay score

odds of building a lasting career here

64Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.

Lottery odds assume a STEM candidate.

Personalize to your clock →

H-1B wage level

the lottery is wage-weighted — each level is one more entry

Level II · 2×
Level I$130,6861 entry
Level II$159,8902 entries
Level III$189,0723 entries
Level IV$218,2754 entries

$4,072 more — $189,072 — moves this role to Level III and 3 lottery entries. That figure is inside the range the employer already advertised.

Based on the DOL prevailing wage for this occupation and worksite, a base salary of $189,072 would place this position at wage Level III. That figure is within the posted range, and I'd like to target it. This role classifies under "Electrical Engineers" for prevailing-wage purposes.

DOL prevailing wage, 2026-27 wage year · Electrical Engineers (17-2071) · San Jose-Sunnyvale-Santa Clara, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.

Employer immigration record

from this employer's Department of Labor filings

Files H-1B transfers

28 transfer filings in the last year, covering 28 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

Community outcomes

No reports yet — be the first to help the next applicant.

About the role

  • Principal Electrical Engineer - Smart Cable Modules
  • We are looking for a Principal Electrical Engineer to take strategic ownership of our Smart Cable Module (SCM) hardware platform.
  • Review and recommendation on PCB stack-up, impedance targets, via structures, and differential-pair routing rules; review and approve layout execution with sufficient SI understanding to ensure first-pass compliance

Responsibilities

  • Define and own the end-to-end electrical architecture for smart cable modules, including SerDes channel topology, power delivery strategy, and thermal budgeting for muti-Gig (112G PAM4 and 56G NRZ ) designs
  • Establish and maintain internal electrical design standards, PCB layout rules, and SI/PI guidelines that the broader hardware team
  • Lead technical reviews (architecture, schematic, layout, DVT) and provide authoritative sign-off on high-speed digital designs
  • engage directly with supplier engineering teams on reference design adaptation and silicon bring-up support.
  • Electrical Design Ownership
  • Drive schematic capture and PCB design for complex multi-layer modules housing muti-Gig SerDes retimer or DSP ASICs in thermally and spatially constrained OSFP/QSFP-DD enclosures
  • Own power delivery design including multi-rail regulation, hot-plug sequencing, brownout protection, and inrush management within MSA-defined power envelopes.
  • Perform analog and mixed-signal sub-circuit design including clock distribution, oscillator selection, ESD protection, and supervisory logic

Requirements

  • Bachelor's or Master's degree in electrical engineering or closely related field;
  • 10-12+ years of progressive electrical engineering experience, with at least 5 years focused on high-speed SerDes-based interconnect, active copper cable, or optical/pluggable module products
  • Demonstrated track record of architecting and delivering production hardware with 56G / 112G and faster SerDes interfaces (Ethernet, PCIe, or InfiniBand)
  • Proficiency with EDA tools: industry-standard schematic capture (Cadence Allegro / OrCAD) and PCB layout review
  • Hands-on experience with CMIS 5.x / SFF-8636 module management and I2C/MDIO interface design

Nice to have

  • Working knowledge of host-side switching ASIC electrical interfaces and SerDes equalization schemes
  • Participation in OIF, IEEE 802.3, or QSFP/OSFP MSA standards bodies
  • Experience with PCIe Gen 5/6 retimer module designs
  • Scripting fluency in Python for lab automation, measurement data reduction, or hardware characterization workflows

Skills

  • Labs (NASDAQ:
  • ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
  • Discover more at www.asteralabs.com.

Compensation

  • Base salary range is $185,000 to $240,000 depending on experience, level, and business need.

This listing is sourced directly from Astera Labs Inc.'s careers page and normalized into a canonical job model.