Baidu
SoC Memory Subsystem Architect
Sunnyvale,CA
Sponsorship not specifiedDetected 84 days ago
PythonData AnalysisExcelHardware DesignLeadershipCommunication
About the role
- The successful candidate will be a motivated self-starter who will thrive in this highly technical environment.
- Participate in performance simulation of features to improve memory subsystem efficiency.
- Analyzing benchmarks, application workloads and performance simulation results to identify areas for microarchitecture optimizations.
Requirements
- 10+ years of experience in Silicon architecture or IP design mainly focusing on memory subsystem.
- Strong understanding of distributed AI training system's requirement on SoC memory subsystem.
- Familiarity with SW and Operating system practices and requirements on memory system.
- Experience in System Performance analysis and debug in pre and/or Post-Silicon environments.
- Experience with data analysis using Excel, Perl, Python etc.
- Demonstrated experience in HW digital design and understanding of CPU/HW Accelerators and/or Peripheral design.
- Solid background of System interconnect, System MMUs, Caches and Memory Technologies (e.g. HBM, GDDR, DDR and LPDDR4/5).
- Master or PhD in Electrical or Computer Engineering.
- Excellent communication skills in both English and Chinese.
- Culture Fit:
- Mission alignment: If you want to be part of a team to accomplish this great mission, we will provide you the best possible platform to do that.
- Self-directed: We work best with people that are driven, motivated, and aspire to greatness.
- Hungry to learn: We are eager to see you learn new skills and grow.
- Team orientation: We work in small, fast-moving teams. We watch out for each other and go after big goals together as a team.
This listing is sourced directly from Baidu's careers page and normalized into a canonical job model.