Micron
Staff GenAI Engineer - Early PDN Modeling
San Jose, CA, USA · Staff+ · Full-time
Sponsorship not specified$170k-$290kDetected 23 hours ago
PythonMachine LearningData AnalysisLLMsAgentic AIElectrical EngineeringCommunication
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odds of building a lasting career here
64Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70
Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.
Lottery odds assume a STEM candidate.
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About the role
- Our vision is to transform how the world uses information to enrich life for all.
- Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
- Our salary ranges are determined by role, level, and location.
Responsibilities
- Apply data-driven methods to predict IR drop, voltage droop, current density, decoupling effectiveness, and electromigration risk during early design stages
- Enable AI-assisted optimization of power grid architectures, bump planning, package-PDN co-design, and decap placement
- Leverage historical design, simulation, and silicon data to drive predictive power integrity insights and design recommendations
- Collaborate across power integrity, design, CAD, package, and product engineering teams to scale AI-enabled methodologies and workflows
- Strong coding skills with the ability to develop and maintain production-quality software in Python or similar languages
- Understanding of power delivery networks, IR drop analysis, voltage integrity, or related semiconductor design domains
- We are building the next generation of memory design by embedding AI into how circuits are designed, validated, and brought to silicon.
- We work at the intersection of design, CAD, and data, and we focus on solutions that scale across teams and technology nodes.
- If you want your work to directly impact silicon outcomes, this team delivers!
- This role is critical to transforming memory design workflows using AI and automation.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience
- 5 to 7 years of experience in power integrity, PDN design, circuit design, physical design, package design, or EDA workflows
Nice to have
- Master's degree or PhD in Electrical Engineering, Computer Science, or related field
- Knowledge of memory subsystem power delivery, package-PDN interactions, and full-chip power integrity methodologies
- Experience with EDA tools and flows for power integrity analysis and optimization
- $170,000.00 - $290,000.00 a year
- The pay scale is subject to change depending on business needs.
Compensation
- The US base salary range that Micron Technology estimates it could pay for this full-time position is:
Benefits
- Additional compensation may include benefits, bonuses and equity.
- Develop machine learning and generative AI solutions to automate root-cause analysis and accelerate PDN design-space exploration
- Experience applying data analysis, machine learning, or automation to engineering workflows
- Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training.
Company info
- We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
Visa & Work Authorization
- ve consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protec
This listing is sourced directly from Micron's careers page and normalized into a canonical job model.