NXP Semiconductors
Senior Verification Engineer
Austin (Oakhill, Office) · Senior
Sponsorship not specifiedDetected 30 days ago
PythonLinuxLLMsVHDLVerilogLeadershipProblem Solving
About the role
- Job Title: Senior Verification Engineer Location: Austin Role Summary: This position is within the MME MCU/MPU Digital IP team.
- In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #LI-6692
Responsibilities
- Develop and implement verification testbenches
- Develop testbench components such as drivers, monitors, and scoreboards, and leverage advanced UVM VIPs
- Develop directed and constrained-random stimulus
- Develop and maintain SystemVerilog assertions (SVA)
Requirements
- BSEE with 5+ years of semiconductor industry experience, or
- MSEE with 3+ years of experience, or
- PhD with 1+ years of experience
Nice to have
- Exhibit strong analytical and problem-solving skills
- familiarity with major simulation and debug tools is a plus
Skills
- Knowledge of protocols such as DDR, PCIe, AMBA (CHI, ACE, AXI)
- Strong expertise in Verilog, SystemVerilog (VHDL is a plus)
- Experience with OVM/UVM and class-based verification methodologies
- Experience with formal verification methodologies
- Experience leveraging AI/LLM-based approaches to improve engineering efficiency
- Test pattern debugging and validation on simulation and automated test environments
- Scripting in Python, Perl, and UNIX/Linux
- Familiarity with functional and code coverage methodologies
- More information about NXP in the United States...
- In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
- Drive a "zero-defect" mindset across the verification team
- Provide technical leadership and guidance on complex verification challenges
Benefits
- Analyze RTL, functional coverage, and assertion coverage results
- Define and develop functional coverage models
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