Western Digital
Principal RFIC Design Engineer
San Jose, CA, United States · Principal
Sponsorship not specifiedDetected 6 days ago
Cloud PlatformsANSYSCadenceElectrical EngineeringVoIPCommunicationAdaptability
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odds of building a lasting career here
42Risky
Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds40
Fits your clock70
Thin sponsorship signal and lottery-bound. A low-probability bet with your clock running. Prioritize cap-exempt roles and proven entry-level sponsors first.
Lottery odds assume a STEM candidate.
Personalize to your clock →Employer immigration record
from this employer's Department of Labor filings
Green-card filing pattern in this occupation
Context, not a finding about this posting: of this employer's 64 green-card filings in this occupation, 100% were for a worker who already held the job.
Green-card follow-through: 81%
Of 58 labor certifications old enough to have been used, 11 expired without the employer filing the next step. Median time from filing to decision: 511 days.100% of their filings were for a worker who already held the job.Only certifications past the 180-day window are counted — recent ones cannot have expired yet.
Files H-1B transfers
90 transfer filings in the last year, covering 414 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.
Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.
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About the role
- It's real systems, at real scale, people solving some of the hardest challenges in technology today.
- Join us and let's shape the future of data.
- We also prohibit harassment of any individual on any of the characteristics listed above.
Responsibilities
- Designer will be responsible for the design of high performance analog and mixed-signal circuit blocks.
- include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation.
- Functional knowledge of logic digital circuits and understanding of basic digital design flow
Requirements
- Every interaction, every model, every system generates data that must be stored, managed, and made accessible over time.
- Candidate must have good verbal and written communications skills and demonstrated track record of circuit innovation, must be a team player, be adaptable, and accept constructive criticism
- Must have hands-on design and development experience in analog and mixed-signal integrated circuit
- Must have experience in at least one preferably multiple area of full CMOS circuit design and development in:
- Must have experience in 40nm and below CMOS technology
- Must have a demonstrable track record of successful design releases and mass production
- Must have thorough knowledge of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.)
- Experience with analog layout techniques of mismatch reduction, gradient suppression, parasitic effects minimization
- Experience with floor planning, block level routing and top level chip routing
- BSEE with minimum 10+ years of experience
Compensation
- The salary range is what we believe to be the range of possible compensation for this role at the time of this posting.
- We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York.
- If your position is non-exempt, you are eligible for overtime pay pursuant to company policy and applicable laws. You may also be eligible for shift differential pay, depending on the shift to which you are assigned.
- You will be eligible to be considered for bonuses under either WD's Short Term Incentive Plan ("STI Plan") or the Sales Incentive Plan ("SIP") which provides incentive awards based on Company and individual performance, depending on your role and your performance.
- You may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan.
- Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable.
Benefits
- Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan.
- RSU awards are also available to eligible new hires, subject to WD's Standard Terms and Conditions for Restricted Stock Unit Awards.
Company info
- As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within.
- We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us.
- We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.
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This listing is sourced directly from Western Digital's careers page and normalized into a canonical job model.