Ciena

Ciena

Mixed Signal IP Integration Engineer – New Grad

Ottawa · Junior · Internship

Sponsorship not specified$75k-$120kDetected 30 days ago
PythonLinuxCadenceVerilogElectrical EngineeringCommunication

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odds of building a lasting career here

43Risky
Cap-exempt (no lottery)0
Sponsors this role62
Entry-level history0
PERM / green-card track0
Lottery odds (Level II)66
Fits your clock70

Thin sponsorship signal and lottery-bound (~30% per draw). A low-probability bet with your clock running. Prioritize cap-exempt roles and proven entry-level sponsors first.

Lottery odds assume a STEM candidate.

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Employer immigration record

from this employer's Department of Labor filings

Green-card filing pattern in this occupation

Context, not a finding about this posting: of this employer's 4 green-card filings in this occupation, 100% were for a worker who already held the job.

Files H-1B transfers

4 transfer filings in the last year, covering 4 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • We're a technology company shaping the future of networking, guided by innovation, integrity, and collaboration.
  • Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Responsibilities

  • At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard.
  • Utilize knowledge of electronics, mathematics, VLSI design, and computer-aided design tools to solve engineering design challenges.
  • Develop understanding of the design and place-and-route of macro-level standard cell interfaces to facilitate analog-digital timing handoff and static timing analysis.
  • Contribute to digital integrated circuit design using standard cell libraries and develop design-for-test solutions and models aligned with ASIC test methodologies.
  • Fully conversant with the custom IC tools from Cadence Design Systems.
  • A solid understanding of digital design, including Verilog/RTL, place-and-route, and static timing analysis.

Requirements

  • Analog design principles and experience with schematic capture, layout, extraction, pre- and post-layout analog simulation, design rule checking, and layout versus schematic verification.
  • Prior experience with Cadence Innovus or Synopsys Integrated Circuit Compiler II.

Skills

  • Work involves advanced nanoscale CMOS technologies that enable high-performance optical and electrical interfaces.

Compensation

  • The salary range for this role is 75,100.00 - 119,900.00
  • Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business.
  • Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.
  • Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission.
  • In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time.

Benefits

  • We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

Equal opportunity

  • If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

This listing is sourced directly from Ciena's careers page and normalized into a canonical job model.