SK hynix America

SK hynix America

Principal Engineer, Signal-Integrity and Power-Integrity

San Jose, CA · Principal

Sponsorship not specified$185k-$220kDetected 2 days ago
PythonFull-Stack DevelopmentMachine LearningANSYSCadenceElectrical EngineeringVoIPLeadershipCommunicationCollaborationMentoringPublic Speaking

About the role

  • SK hynix America is seeking a Principal Engineer to lead the Signal‑Integrity and Power‑Integrity (SIPI) strategy for next‑generation advanced packaging technologies.

Responsibilities

  • Strategic Leadership: Define and own the SIPI roadmap for advanced PKG families, aligning technical direction with product and business goals.
  • Architecture & Design: Lead the creation of high‑performance SiP architectures (HBM, interposer, 3 D stacks) and validate power‑delivery and signal‑integrity across the full stack-from silicon to substrate.
  • Technical Ownership: Oversee the end‑to‑end design flow (package definition, simulation, layout sign‑off, tape‑out) and drive continuous improvement of tools, scripts, and automation.
  • Mentorship & Talent Development: Coach senior and junior engineers, fostering expertise in SIPI analysis, tool usage, and design verification
  • Risk Management & Sign‑off: Conduct comprehensive risk assessments, lead design reviews, and deliver final SIPI sign‑off packages that meet performance, reliability, and schedule targets.
  • Mentorship & Talent Development: Coach senior and junior engineers, fostering expertise in SIPI analysis, tool usage, and design verification; champion knowledge‑sharing across global teams.
  • Define and own the SIPI roadmap for advanced PKG families, aligning technical direction with product and business goals.
  • Lead the creation of high‑performance SiP architectures (HBM, interposer, 3 D stacks) and validate power‑delivery and signal‑integrity across the full stack-from silicon to substrate.
  • In this role, you will lead the design, analysis, and validation of next generation advanced packaging solutions for HBM and beyond HBM such as logic-memory integration.
  • The position requires deep technical expertise in high-speed interface design, collaboration with global R&D teams, and contributions to industry standards for advanced packaging.

Requirements

  • Technical Expertise: Deep knowledge of 2.5 D/3 D package architectures, HBM, interposer, TSV, high‑speed I/O standards, and power‑delivery networks.
  • Proven proficiency with SIPI simulation tools (e.g., Ansys SIwave/RedHawk, Cadence Sigrity).
  • ability to present complex technical concepts to both engineering and executive audiences.
  • Ph.D. in Electrical Engineering, or a related field (or Master's degree with 5+ years of relevant industry experience).
  • Deep knowledge of 2.5 D/3 D package architectures, HBM, interposer, TSV, high‑speed I/O standards, and power‑delivery networks.
  • Education: Ph.D. in Electrical Engineering, or a related field (or Master's degree with 5+ years of relevant industry experience).
  • Technical Expertise: Deep knowledge of 2.5 D/3 D package architectures, HBM, interposer, TSV, high‑speed I/O standards, and power‑delivery networks. Proven proficiency with SIPI simulation tools (e.g., Ansys SIwave/RedHawk, Cadence Sigrity).
  • Design Flow Mastery: Strong background in electromagnetic extraction, multi‑port S‑parameter analysis, power‑network optimization, and tape‑out sign‑off processes for complex packages.
  • Leadership Skills: Demonstrated ability to influence multi‑disciplinary teams, drive technical decisions, and mentor senior engineers.
  • Communication: Excellent verbal and written communication skills

Nice to have

  • Hands-on experience with 2.5D/3D packaging for HBM, interposers, or GPU-memory integration.
  • Expertise in power integrity (PI) for 3D-stacked memory systems, including PDN impedance profiling and IBIS model validation for HBM.
  • In‑depth familiarity with industry standards such as PCIe Gen5/Gen6, CXL, UCIe, and JEDEC memory specifications.
  • Proficiency in scripting/automation (Python, TCL, SKILL) to create custom analysis flows and improve productivity.
  • Experience validating high-speed memory interfaces using oscilloscopes, VNAs, and compliance test platforms specific to 3D packaging.
  • History of published technical papers, patents, or conference presentations in advanced packaging or SIPI.

Skills

  • About SK hynix America

Compensation

  • Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets.
  • Pay within the provided range varies by work location and may also depend on job-related skills and experience.
  • Your Recruiter can share more about the specific salary range for the job location during the hiring process.
  • $185,000 - $220,000 USD

Benefits

  • Top Tier health insurance at no employee cost
  • Paid day offs: PTO + Company Holidays + Happy Fridays
  • Paid Parental Leave Program
  • Educational reimbursement up to $10,000 per year

Equal opportunity

  • SKHYA is an Equal Employment Opportunity Employer.
  • We provide equal employment opportunities to all qualified applicants and employees and prohibit discrimination and harassment of any type without regard to race, sex, pregnancy, sexual orientation, religion, age, gender identity, national origin, color, protected veteran or disability status, genetic information or any other status protected under federal, state, or local applicable laws.
  • Compensation:
  • Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets.
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