Nexthop AI
Digital Verification Engineer
Santa Clara, California
Sponsorship not specifiedDetected 7 hours ago
FPGAVerilogElectrical EngineeringHardware DesignCollaboration
About the role
- At Nexthop AI, the correctness of our digital logic is non-negotiable - a single functional escape in an FPGA or ASIC can compromise an entire switching platform once it ships.
Responsibilities
- Own the testbench: Design, build, and maintain the verification environments for our digital subsystems - from block level through full-chip / subsystem integration - for both FPGA and ASIC targets.
- Reference modeling: Develop behavioral / reference models where needed to independently predict expected DUT behavior and catch discrepancies automatically.
- triage failures to root cause and partner with RTL designers on the fix.
- Regression: Stand up and maintain automated regression suites - keeping them fast, deterministic, and green so the team gets rapid feedback on every RTL change.
- Waveform debug: Debug efficiently at the waveform level and produce clear, reproducible failure reports that shorten the design-debug loop.
Requirements
- Tools: Hands-on experience with logic simulators - Modelsim / Questasim and/or NC-Verilog.
- Experience collaborating with software / firmware teams on system bring-up and HW/SW co-validation.
- Familiarity with networking / switching datapaths or high-speed interfaces.
Nice to have
- Proficiency in Verilog (SystemVerilog strongly preferred).
- Language: Proficiency in Verilog (SystemVerilog strongly preferred).
Skills
- Hands-on experience with logic simulators - Modelsim / Questasim and/or NC-Verilog.
Benefits
- Test Development & Coverage
- Coverage-driven closure: Define functional and code-coverage goals and drive them to closure - identifying coverage holes and writing the stimulus to fill them.
Company info
- Fast, deterministic regressions catch breakage the same day it's introduced, so designers refactor with confidence.
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This listing is sourced directly from Nexthop AI's careers page and normalized into a canonical job model.