Hpe
Design Verification Manager
Sunnyvale, California, United States of America
Sponsorship not specified$174k-$353kDetected 1 day ago
Code ReviewMachine LearningPerformance ManagementVerilogElectrical EngineeringLeadershipCommunicationCollaborationMentoring
About the role
- In this pivotal leadership role, you will architect, guide, and execute advanced verification strategies for high-performance, next-generation semiconductor products.
Responsibilities
- Verification Strategy & Architecture: Define global verification strategies, infrastructure, and execution plans for complex SoC and IP blocks. Own the testbench architecture from initial specifications down to structural sign-off.
- Methodology Champion: Drive standard-setting execution using industry-best paradigms, ranging from advanced functional metric tracking to pioneering automated flows. Lead the team across block, sub-system, and full-chip verification environments.
- Team Leadership & Mentorship: Manage, inspire, and grow a team of high-performing design verification engineers.
- Design Verification Manager
- Own the testbench architecture from initial specifications down to structural sign-off.
- Drive standard-setting execution using industry-best paradigms, ranging from advanced functional metric tracking to pioneering automated flows.
- Lead the team across block, sub-system, and full-chip verification environments.
- 10 + years of deep, hands-on industry experience in pre-silicon ASIC/SoC Design Verification.
- Any reliance on fraudulent communication is at the individual's own risk, and HPE disclaims legal liability for any resulting damages.
- We have the flexibility to manage our work and personal needs.
Requirements
- Leadership Experience: 5 + years of dedicated engineering management or formal team leadership experience directly managing engineering headcount, performance reviews, and project delivery schedules.
- Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or a closely related technical field.
- Master's degree or Ph.D. in Electrical Engineering or Computer Science.
- The ideal candidate is a hands-on technical authority capable of conducting rigorous code reviews, mentoring senior staff, and charting verification roadmaps across the following pillars:
- Minimum Qualifications:
- Education: Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or a closely related technical field.
- Verification Experience: 10 + years of deep, hands-on industry experience in pre-silicon ASIC/SoC Design Verification.
- Proven mastery building scalable UVM-compliant testbenches from scratch.
Nice to have
- Experience with multi-protocol high-speed interfaces (e.g., PCIe Gen6/7, CXL, HBM3, NVLink ).
- What We Can Offer You:
- Personal & Professional Development
- We also invest in your career because the better you are, the better we all are.
- We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.
- Unconditional Inclusion
- We know varied backgrounds are valued and succeed here.
- We make bold moves, together, and are a force for good.
Skills
- Methodology (UVM) architecture.
- "The expected salary/wage range for this position is provided below.
- Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.
Compensation
- USD 174,000 - 352,500 in California
- The listed salary range reflects base salary.
Benefits
- Health & Wellbeing
- Foster a culture of technical excellence, continuous learning, and collaborative accountability.
Company info
- Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world. Our culture thrives on finding new and better ways to accelerate what's next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.
- Job Description:
- We are seeking a visionary and technically rigorous Design Verification Manager to lead our world-class silicon verification team. In this pivotal leadership role, you will architect, guide, and execute advanced verification strategies for high-performance, next-generation semiconductor products.
- As a manager, you will bridge the gap between high-level architectural complexity and flawlessly executed silicon. You will be responsible for leading an elite engineering group, driving the adoption of cutting-edge methodology, and ensuring zero-bug tape-outs. If you thrive on solving complex microarchitectural puzzles, scaling high-performing teams, and pushing the boundaries of pre-silicon validation quality, this role offers an unparalleled opportunity to make an industry-wide impact.
- Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work.
- We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.
- Our culture thrives on finding new and better ways to accelerate what's next.
- If you are looking to stretch and grow your career our culture will embrace you.
- Open up opportunities with HPE.
- We are seeking a visionary and technically rigorous Design Verification Manager to lead our world-class silicon verification team.
Equal opportunity
- Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.
This listing is sourced directly from Hpe's careers page and normalized into a canonical job model.