Cadence
SSG Design Engineering Intern (Fall 2026)
SAN JOSE · Intern · Internship
Sponsorship not specifiedDetected 6 days ago
BashIntellectual PropertyCadenceVerilogElectrical Engineering5G/LTECommunication
About the role
- The Cadence SSG Team is hiring graduates to join our R&D teams in San Jose, CA.
- Ideal candidates should be from local school near office.
- The annual salary range for California is $35/hr to $62/hr.
Skills
- Design Engineering Intern
Compensation
- bonus, equity, and benefits.Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
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