Apptronik
Senior PCBA Design Engineer
Austin, TX · Senior
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About the role
- ESSENTIAL DUTIES AND RESPONSIBILITIES or KEY ACCOUNTABILITIES
- Define stack-up, layer count, and material selection to meet electrical, thermal, and cost targets.
- Mentorship: Act as a technical mentor to junior/mid-level designers on layout best practices, documentation standards, and use of Altium tools.
Responsibilities
- You will take boards from architecture and stack-up definition through layout, incorporating best practices such as design-for-manufacturability (DFM), signal integrity, power integrity, and EMC.
- In this role, you will partner closely with electrical, mechanical, and manufacturing teams to deliver reliable, production-ready designs on schedule.
- PCB Design & Layout: Perform schematic capture and PCB layout for mixed-signal, power, and high-speed digital boards. Define stack-up, layer count, and material selection to meet electrical, thermal, and cost targets.
- Implement controlled-impedance routing, differential pair routing, length matching/tuning, and via strategy for high-speed interfaces (e.g., PCIe, DDR, USB, Ethernet, LVDS, SerDes).
- Apply design-for-manufacturability and design-for-assembly best practices; partner with PCB fabricators and contract manufacturers (CMs) on design rule checks, panelization, tolerancing, and yield/cost tradeoffs.
- Apply grounding, shielding, filtering, and layer-stack techniques to mitigate EMI/EMC risk, and support pre-compliance and regulatory testing (e.g., CE, FCC, UL) as needed.
- Design and document to relevant IPC standards (e.g., IPC-2221, IPC-6012, IPC-2152) and internal design rules; maintain and evolve design rule sets, layer stack templates, and library standards.
- Generate complete manufacturing outputs - Gerbers, drill files, BOMs, fabrication drawings, and assembly drawings - along with clear design documentation and constraint files.
- High-Speed Design: Implement controlled-impedance routing, differential pair routing, length matching/tuning, and via strategy for high-speed interfaces (e.g., PCIe, DDR, USB, Ethernet, LVDS, SerDes).
- DFM / DFA: Apply design-for-manufacturability and design-for-assembly best practices; partner with PCB fabricators and contract manufacturers (CMs) on design rule checks, panelization, tolerancing, and yield/cost tradeoffs.
Requirements
- Expert-level proficiency in Altium Designer for schematic capture and PCB layout
- Must be able to lift 15 pounds at times
- Demonstrated experience with high-speed digital layout: impedance-controlled routing, differential pairs, length matching, via optimization, and stack-up design for GHz-class interfaces.
Nice to have
- Working knowledge of signal integrity (SI) and power integrity (PI) concepts and how layout decisions affect them
- experience collaborating with SI/PI engineers or running basic simulation/analysis a plus.
- Solid understanding of DFM/DFA principles and hands-on experience working directly with fabrication houses and contract manufacturers.
- Practical knowledge of EMC/EMI mitigation techniques in layout (grounding, shielding, plane splits, filtering placement).
- Familiarity with IPC standards
- IPC Certified Interconnect Designer (CID) or CID+ certification preferred but not required.
- Experience with flex, rigid-flex, or HDI/microvia design a plus.
- Strong written and verbal communication skills
Benefits
- Our flagship humanoid robot, Apollo, is built to collaborate thoughtfully with people, starting with critical industries such as manufacturing and logistics, with future applications in healthcare, the home, and beyond.
Company info
- We're looking for a Senior ECAD Designer to own PCB schematic capture and layout in Altium Designer, with particular depth in power electronics and high-speed digital design.
This listing is sourced directly from Apptronik's careers page and normalized into a canonical job model.