Micron
Principal DFT Engineer, HBM
Folsom, CA, USA · Principal · Full-time
Sponsorship not specified$146k-$309kDetected 15 days ago
PythonCadenceElectrical EngineeringCommunication
About the role
- Our vision is to transform how the world uses information to enrich life for all.
- Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
- Our salary ranges are determined by role, level, and location.
Responsibilities
- Own SoC-level DFT implementation, including scan, MBIST, LBIST (as applicable), boundary scan (JTAG), and test access architectures for HBM base-die designs.
- Drive DFT architecture definition early in the design cycle, ensuring alignment with SoC integration, floor planning, timing, power, and physical design constraints.
- Implement and integrate DFT logic at the block, subsystem, and full-chip levels, working closely with RTL and integration teams.
- Collaborate with physical design teams to ensure DFT solutions are optimized for placement, routing, timing closure, and DRC/LVS signoff.
- Support pre-silicon debug of DFT-related issues and assist with post-silicon bring-up and yield/debug analysis.
- Partner with CAD and methodology teams to define, improve, and standardize DFT flows across HBM SoC programs.
- 7+ years of relevant experience in SoC design, DFT, or implementation for complex digital ASICs or SoCs.
- As a Principal SoC DFT Engineer within the Heterogeneous Integration Group (HIG), you will be responsible for the DFT architecture, implementation, and signoff of complex HBM base-die System-on-Chip (SoC) designs.
Requirements
- Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or related field.
- Experience with scan insertion, MBIST/LBIST architectures, JTAG/boundary scan, and ATPG concepts.
- Experience working with large, complex SoCs involving multiple IPs and subsystems.
- Proficiency with industry-standard EDA tools from Siemens, Synopsys, and/or Cadence for DFT and implementation.
- Familiarity with scripting languages (Python, Tcl, Perl, etc.) for flow automation.
Compensation
- The US base salary range that Micron Technology estimates it could pay for this full-time position is:
Benefits
- Additional compensation may include benefits, bonuses and equity.
- Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
- As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.
- Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
- Own DFT flow execution and signoff, including lint, CDC, DFT rule checks, ATPG readiness, and coverage closure.
- Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training.
Visa & Work Authorization
- ve consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protec
This listing is sourced directly from Micron's careers page and normalized into a canonical job model.