Astera Labs Inc.
Principal Design Verification Engineer
Toronto, Ontario, Canada · Principal
Work authorization requiredDetected 4 days ago
PythonC++ExpressComplianceFPGAVerilogCommunication
About the role
- Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
- Think and act fast with the customer in mind! - Authorized to work in Canada and start immediately.
- Base salary range is $165,000 CAD -$210,000 CAD, and will be determined based on the candidate's capabilities and employees in similar positions.
Responsibilities
- S/W debugging for SoC based designs in the area of kernel/device-drivers/u-boot
Requirements
- At minimum, a Bachelor's in EE is
- Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for
- Required Experience:
- Experience with integrating C/C++ in System Verilog environments using DPI/PLI
- Ability to use scripting tools (Perl/Python) to automate verification infrastructure.
- Must be able to work independently to develop test-plans, and related test-sequences in UVM to
- Must have prior experience using Verification IPs from 3rd party vendors for communication protocols
- Physical Layer, Link Layer and Transaction Layer verification expertise in PCIe protocol.
- Experience in memory technologies like DDR4/DDR5/HBM.
- Experience with FPGA-based verification/emulation.
Nice to have
- required, and a Maser's is preferred.
- Preferred Experience:
Skills
- ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
- Discover more at www.asteralabs.com.
Compensation
- Base salary range is $165,000 CAD -$210,000 CAD, and will be determined based on the candidate's capabilities and employees in similar positions.
Visa & Work Authorization
- Think and act fast with the customer in mind! - Authorized to work in Canada and start immediately.
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This listing is sourced directly from Astera Labs Inc.'s careers page and normalized into a canonical job model.