Cadence
Firmware Engineer II
AUSTIN · Mid
Sponsorship not specifiedDetected 9 days ago
PythonAlgorithmsCadenceEmbedded Systems
About the role
- At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
- Be part of the Cadence DDR PHY IP Front End Design team responsible for -
Responsibilities
- Develop firmware for DDR5 PHY using microcontrollers
- Developing firmware in C typically involving bare-metal programming and developing low-level APIs on Microcontrollers.
- Responsible for collaborating with hardware designers and memory subsystem architects to derive training algorithms and implement them.
- Develop and Debug firmware in RTL based hardware simulations (C +Verilog simulations)
- Develop and Debug on Silicon bring-up boards.
Skills
- Good Knowledge of DDR5 JEDEC spec, knowledge of different DIMM configurations and specifications.
- Good Knowledge of C programming language for embedded software development and use of relevant IDE.
- Comfortable debugging RTL simulations involving firmware and microcontroller subsystem.
- Good knowledge of Shell/Perl/Python/TCL scripting
- Good experience on Verification EDA Tools like simulators and waveform viewers
- Help us solve what others can't.
Company info
- At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
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This listing is sourced directly from Cadence's careers page and normalized into a canonical job model.