Semtech
Sr. Staff NPI Test Engineer
CAN - Burlington, ON · Staff+
Sponsorship not specified$95k-$122kDetected 31 days ago
PythonC++Machine LearningData AnalysisPCB DesignAltiumCadenceRF EngineeringResearchLeadershipCommunicationMentoring
About the role
- Staff NPI Test Engineer to serve as the technical authority and strategic leader for new product introduction test development in our mixed-signal product portfolio.
- This role demands a proven innovator who can architect comprehensive test solutions spanning from early silicon validation through high-volume production.
- Technical Leadership & Architecture (30%)
Responsibilities
- Lead development of innovative test methodologies for high-speed SerDes, CDRs, and signal conditioning products
- Develop and implement advanced test techniques for products operating at >200Gbps data rates
- Create reusable test IP, libraries, and frameworks that accelerate NPI cycles across product families
- Lead test readiness reviews with stakeholders, providing strategic recommendations
- Collaborate with Product Engineering to define characterization strategies and correlation methodologies
- Drive continuous improvement initiatives that reduce NPI cycle time by 10-20%
- Research and implement next-generation ATE capabilities and measurement techniques
- Drive DFT/testability requirements into IC architecture, establishing company-wide standards and best practices
- Builds test capabilities that enable entry into new markets and applications
Requirements
- Technical Expertise:
- Expert-level proficiency with Advantest V93000 platform (SmarTest 7/8)
- Expertise in analog/mixed-signal DFT techniques (BIST, scan, boundary scan)
- Proficiency in RF/microwave test techniques beyond 40GHz
- Experience with PCB design tools (Cadence, Altium) and signal integrity simulation
- Demonstrated ability to influence without direct authority across organizations
- Track record of delivering complex projects on aggressive schedules
- Master's degree or PhD in relevant engineering discipline
- 8+ years in semiconductor test with focus on SerDes/high-speed I/O
- Experience with SiGe BiCMOS process technology and its test challenges
- Experience with wafer-level testing and probe card design
- Experience with test data analytics and machine learning applications
Compensation
- A reasonable estimate of the pay range for this position is $95,000-$122,000.
Benefits
- Perform technical risk assessment and mitigation strategies for test coverage and quality
- Partner with IC design teams from concept phase to ensure optimal test coverage and manufacturability
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