Cisco
ASIC Design Engineer I (Intern) - United States
San Jose, California, US · Intern · Internship
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odds of building a lasting career here
Sponsors, but it's cap-subject — you still face the weighted lottery (~30% per draw at Level II). Good if you win; have a cap-exempt backup on your list.
Lottery odds assume a STEM candidate.
Personalize to your clock →H-1B wage level
the lottery is wage-weighted — each level is one more entry
The bottom of this range ($44,000) is below the Level I prevailing wage of $90,376. An H-1B cannot be filed below the prevailing wage, so an offer at the floor of this band could not be sponsored as posted.
Based on the DOL prevailing wage for this occupation and worksite, a base salary of $114,026 would place this position at wage Level II. That figure is within the posted range, and I'd like to target it. This role classifies under "Civil Engineers" for prevailing-wage purposes.
DOL prevailing wage, 2026-27 wage year · Civil Engineers (17-2051) · San Jose-Sunnyvale-Santa Clara, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.
Employer immigration record
from this employer's Department of Labor filings
Green-card follow-through: 93%
Files H-1B transfers
Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.
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About the role
- Please note this posting is to advertise potential job opportunities.
- This exact role may not be open today but could open in the near future.
- When you apply, a Cisco representative may contact you directly if a relevant position opens.
Responsibilities
- As an ASIC Design Engineer, you will play a pivotal role in designing and integrating next-generation silicon for Cisco's core networking products.
- You'll contribute to all phases of the ASIC design lifecycle, collaborating with cross-functional teams to ensure robust, high-performance solutions.
- Participate in the creation of design specifications and in micro-architecture specification reviews.
- Implement Verilog RTL to meet timing, performance, and power requirements.
- Contribute to full chip integration and support timing methodology and analysis.
- Collaborate with the physical design team to resolve timing and place-and-route issues.
- Perform diagnostic and post-silicon validation tests in the lab.
Requirements
- Currently enrolled in an undergraduate degree program (Associate's or Bachelor's)
- Expected to continue enrollment in degree program following completion of the internship.
- Foundational knowledge and academic project experience in Verilog/SystemVerilog
Nice to have
- Proficiency in scripting languages such as Python, Perl, TCL, or shell for task automation.
- Coursework or project experience related to networking protocols and architectures.
- Additional paid time away may be requested to deal with critical or emergency issues for family members
- Optional 10 paid days per full calendar year to volunteer
- 1.5% of incentive target for each 1% of attainment between 50% and 75%;
- 1% of incentive target for each 1% of attainment between 75% and 100%
- Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
- We work as a team, collaborating with empathy to make really big things happen on a global scale.
Compensation
- The full salary range for certain locations is listed below.
Benefits
- Develop, analyze, and ensure functional coverage.
- Collaborate with the verification team to address design bugs and close code coverage.
Company info
- We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow.
- At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond.
- These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
This listing is sourced directly from Cisco's careers page and normalized into a canonical job model.