Nuvacore
CPU Custom Circuit Lead
Austin, TX · Senior
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About the role
- Lead a small team of engineers responsible for development of custom memories (SRAM and register files) used in development of a high performance CPU
- As a Custom Design Lead, you will participate in and direct work in the following:
- Manage engineers performing end-to-end memory IP signoff: schematic and layout through DRC/LVS/antenna, parasitic extraction, and characterization (timing, power, and noise in Liberty/CCS format) across PVT corners, meeting target PPA commitments.
Responsibilities
- Nuvacore is building ground-up high performance, low-power CPU for next-generation compute workloads.
- As a member of the CPU-specific custom circuit design team, you will enable the design to achieve the target PPA specifications for the product.
- Manage and help participate in schematic development and characterization of custom memories (SRAM, register files) to optimize PPA at advanced process nodes.
- Supervise layout implementation, defining macro floor planning, critical routing specifications, and driving physical design verification (PDV) closure.
- Partner with Foundry/PDK, CAD, Physical Design, RTL and DFT teams to benchmark new process technology, validate IP on testchips, and co-optimize custom memories for downstream design PPA.
- Collaborate closely with RTL, providing explicit custom memory functional specifications, timing behaviors, and state definitions to support accurate RTL modeling.
Requirements
- Hold a BS, MS, or PhD degree with 12+ years of experience in custom memory circuit design - SRAMs, and/or Register files.
- Hands-on transistor-level circuit design experience with combo cells, sequential logic in static/dynamic logic families, as well as memory arrays - bit cells, sense amps, decoders - in advanced CMOS nodes.
- Deep knowledge of SPICE simulations, SRAMs / Register File circuit margins, and special memory cells architecture.
- Demonstrated track record delivering production-level custom memory IP through tape-out, with silicon-validated PPA in high-volume products.
- Experience managing engineers and providing technical leadership to a custom circuit team
- Proven PPA-focused execution, including SRAM architecture trade-offs, critical-path modeling, full-cut analysis, and extensive Monte Carlo variation studies.
- Experience partnering directly with foundries on PDK bring-up and device co-optimization (DTCO) at leading-edge nodes.
- Experience using Agentic AI tools for productivity and automation.
Compensation
- $200k-$300k
This listing is sourced directly from Nuvacore's careers page and normalized into a canonical job model.