Marvell Semiconductor Inc.
Senior Staff Engineer, ASIC/VLSI Synthesis and Design
Irvine, California, USA · Staff+ · full-time
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odds of building a lasting career here
Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.
Lottery odds assume a STEM candidate.
Personalize to your clock →H-1B wage level
the lottery is wage-weighted — each level is one more entry
$12,466 more — $148,366 — moves this role to Level III and 3 lottery entries. That figure is inside the range the employer already advertised.
Based on the DOL prevailing wage for this occupation and worksite, a base salary of $148,366 would place this position at wage Level III. That figure is within the posted range, and I'd like to target it. This role classifies under "Electronics Engineers, Except Computer" for prevailing-wage purposes.
DOL prevailing wage, 2026-27 wage year · Electronics Engineers, Except Computer (17-2072) · Los Angeles-Long Beach-Anaheim, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.
Employer immigration record
from this employer's Department of Labor filings
Green-card filing pattern in this occupation
Green-card follow-through: 100%
Reported a layoff in this occupation
Files H-1B transfers
Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.
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About the role
- At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow.
- Your Team, Your Impact As Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOC) to systems of chips.
Responsibilities
- About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.
- For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
- Marvell's Photonic Fabric is the next-generation interconnect technology that delivers a tenfold increase in performance and energy efficiency compared to competing solutions.
- Essential Duties And Responsibilities Develop and validate timing constraints for intricate SoC designs.
- Own and contribute to various Front-End Implementation tasks & flows like Synthesis, UPF development, Logical Equivalence Checks (LEC), Functional ECOs, etc.
- Analyze and understand the tradeoffs between power/performance and area goals to drive them into overall chip implementation flows.
- Document best practices and lessons learned to drive continuous improvements in future projects.
Requirements
- Minimum of 5 years of industry experience in ASIC implementation and synthesis.
- Strong understanding of ASIC design flows, from RTL to GDSII.
- Knowledge and hands-on experience with synthesis and STA methodologies and implementation.
- Proficiency in using synthesis tools, STA tools, and scripting languages (e.g., Tcl, Perl).
- Experience with high-complexity silicon in advanced technology nodes, preferably TSMC N4/N5.
- Strong understanding of timing constraint development for hierarchical designs.
- Experience doing functional ECOs using industry standard tools and flows like Conformal ECO.
- Experience with UPF development for blocks and SoCs.
- Excellent problem-solving skills, attention to detail, and ability to analyze and debug complex issues.
- As such, applicants must be eligible to access export-controlled information as defined under applicable law.
Skills
- Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
Compensation
- $136k-$201k
Company info
- The Photonic Fabric is available to our customers in multiple technology offerings, including optical interface chiplets, optical interposers, and Optical Multi-chip Interconnect Bridges (OMIB).
- This allows customers to easily incorporate high bandwidth, low power, and low latency optical interfaces into their AI accelerators and GPUs.
- What You Can Expect About The Role We are seeking a highly skilled and experienced synthesis and ASIC front-end implementation Engineer to join our team.
Visa & Work Authorization
- export control laws and regulations, including the Export Administration Regulations (EAR)
This listing is sourced directly from Marvell Semiconductor Inc.'s careers page and normalized into a canonical job model.