Astera Labs Inc.

Astera Labs Inc.

Optical FW/SW Engineer – Tech Lead

San Jose, California, United States · Senior

Sponsorship not specified$160k-$200kDetected 9 days ago
PythonAlgorithmsEmbedded SystemsElectrical EngineeringSignal ProcessingCommunication

Stay score

odds of building a lasting career here

64Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.

Lottery odds assume a STEM candidate.

Personalize to your clock →

H-1B wage level

the lottery is wage-weighted — each level is one more entry

Level I · 1×
Level I$152,7971 entry
Level II$187,0752 entries
Level III$221,3743 entries
Level IV$255,6534 entries

$27,075 more$187,075 — moves this role to Level II and 2 lottery entries. That figure is inside the range the employer already advertised.

Based on the DOL prevailing wage for this occupation and worksite, a base salary of $187,075 would place this position at wage Level II. That figure is within the posted range, and I'd like to target it. This role classifies under "Software Developers" for prevailing-wage purposes.

DOL prevailing wage, 2026-27 wage year · Software Developers (15-1252) · San Jose-Sunnyvale-Santa Clara, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.

Employer immigration record

from this employer's Department of Labor filings

Files H-1B transfers

28 transfer filings in the last year, covering 28 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • This role sits at the intersection of embedded systems, optics, and hardware.
  • Your work will help enable reliable, scalable connectivity for rack-scale AI infrastructure as Astera Labs advances the transition to higher-bandwidth optical interconnects.

Responsibilities

  • Architect, develop, optimize, and maintain production-quality embedded firmware for optical engines, PIC/EIC platforms, and optical modules.
  • Implement software in C on embedded processors using bare-metal or RTOS-based designs.
  • Develop Python scripts and tools for unit-testing, configuration, automation, characterization, manufacturing test, and data analysis.
  • Develop control algorithms for modulator operation, automatic power control, temperature compensation, calibration, and link adaptation.
  • Optimize firmware for latency, power efficiency, control stability, and performance across evolving optical architectures.
  • Lead firmware and hardware bring-up, including board initialization, peripheral integration, lab debugging, and root-cause analysis.
  • Partner with optical, electrical, DSP, systems, and validation teams to characterize, tune, and qualify optical products.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a related technical field.
  • 5-8 years of experience developing embedded firmware or software for optical, photonics, communications, semiconductor, or other high-reliability products.
  • Experience with RTOS-based embedded development, embedded programming methods, hardware interfaces, and low-level device control.
  • Proven experience with unit testing, version control, debugging, and hardware bring-up.
  • Ability to analyze and resolve complex problems across firmware, hardware, optical control algorithms, and system-level behavior.

Nice to have

  • Experience with optical module management, CMIS, telemetry, diagnostics, or control requirements.
  • Experience with optical engines, pluggable optics, silicon photonics, PIC/EIC integration, NPO, or CPO.
  • Knowledge of lasers, modulators, photodetectors, TIAs, thermal tuning, wavelength control, calibration, and high-speed optical link behavior.
  • Familiarity with JTAG, oscilloscopes, logic analyzers, optical test equipment, and protocol analyzers.
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Skills

  • Optical Firmware Architecture and Development
  • Optical Control and Performance Optimization
  • Hardware Bring-Up, Product Validation, and Quality
  • Integrate firmware with photodetectors, TIAs, ADCs, DACs, sensors, drivers, DSPs, and hardware control interfaces such as I2C and SPI.
  • Apply disciplined version-control, code-review, documentation, and release practices throughout the development lifecycle.

Compensation

  • Develop control algorithms for modulator operation, automatic power control, temperature compensation, calibration, and link adaptation.

Benefits

  • Implement telemetry, diagnostics, monitoring, and fault-handling features that improve optical-link health, reliability, and serviceability.
  • Establish unit-testing strategies and maintain automated tests that improve firmware quality, coverage, and release confidence.

This listing is sourced directly from Astera Labs Inc.'s careers page and normalized into a canonical job model.